• Marvell’s custom silicon innovations, such as its customized HBM/SRAM memory and PIVR voltage regulator solutions, coupled with its upcoming in-package microfluidic-based cooling solutions, will help data center operators overcome two of their biggest challenges: power consumption and cooling.
• Following its acquisition of Celestial AI, Marvell will be able to offer a complete portfolio of copper and optical scale-up solutions for single and multiple rack configurations. Counterpoint Research expects that the emerging optical scale-up market will be considerably larger than the existing copper-based scale-up market.
• The acquisition of Celestial AI and the more recent acquisition of XConn Technologies, a specialist in CXL and PCIe switching, coupled with its own Structera CXL memory products, provides Marvell with a solid technology base to target a range of new market memory opportunities beyond cloud and AI data centers.

Marvell held its annual Industry Analyst Conference in Santa Clara in early December, where the company outlined its strategy for the next few years, as well as making some important product announcements. Although Marvell has multiple business units, the event focused solely on its AI data center business, comprising custom compute and optical/electrical connectivity solutions.

Custom Silicon Innovations

A recurring theme throughout the day was that “power is the new currency” and that data center operators are constrained by the power available to them. There is, therefore, a tremendous focus on reducing power requirements across data centers. Marvell has developed three custom compute solutions that provide substantial power reductions:

Customized HBM Memory - Marvell’s customized HBM solution delivers higher XPU performance while reducing interface power consumption by 75% compared to standard JEDEC-based interfaces. Reducing HBM size also provides 25% more real estate. Customers can leverage these savings to add more compute or HBM memory per XPU – or add new features.

Custom dense SRAM Memory - Marvell has developed a 2nm custom SRAM chip that occupies 50% less area at the same bandwidth compared to off-the-shelf chips. The chip is optimised to deliver maximum bandwidth to a data center, with 17x more bandwidth/mm2 compared to alternative chips. It also boasts 66% lower standby power. This enables customers to use more SRAM in their XPUs or have more compute at the same power. Marvell has redesigned its embedded SRAM and achieved an 80% reduction in total power compared to off-the-shelf alternatives.

Package-Integrated Voltage Regulator (PIVR) – as XPUs scale toward 4kW and beyond, traditional power delivery from the motherboard becomes highly inefficient. To help overcome this "power wall" effect, Marvell has developed a PIVR chip that essentially moves voltage regulation from several inches away on the PCB to directly underneath the chip package itself, eliminating the considerable power loss that occurs when electricity travels through the motherboard PCB.

By integrating technology from a number of power semiconductor partners directly into the packaging, hyperscalers are able to run 4kW+ processors that would otherwise be impossible to power or cool using traditional methods. Key partners include:

• Empower Semiconductor - provides its FinFast™ technology, which allows for vertical power delivery. The company’s regulators are ultra-thin and can be placed directly under the processor, shrinking the power supply footprint by 5x.
• Endura Technologies - offers a unique, node-agnostic digital architecture for 2.5D and 3D system architectures, focusing on high current density and minimal "voltage droop" (i.e., sudden voltage drops during high activity).
• Infineon - leverages thin vertical trench technology and high-density power modules to bring power conversion as close as possible to the silicon.
• Monolithic Power Systems (MPS) - contributes high-performance power management ICs (PMICs) and deep expertise in scaling power for hyperscale cloud infrastructure.

Marvell’s PIVR chip reduces power loss by 85% while achieving a 15% reduction in total product power. In addition, the PIVR chip enables a 60% reduction in power noise. Denser power delivery enables more compute per rack, which in turn increases ROI for data center operators.

Scale-up Products and Solutions

Another major theme was scaling-up AI servers and racks. Marvell demonstrated a range of copper and optical scale-up cable solutions at the event including several new products focused on multi rack scale-up solutions.

Copper-based scale-up

Copper will always remain the preferred scale-up solution, wherever possible, due to its low cost and simplicity, particularly for short-range, intra-rack applications. For example, 224G copper-based solutions based on Active Copper Cable (ACC) or Active Electrical Cable (AEC) are adequate for in rack scale-up, i.e., connecting XPUs to a switch. Marvell also demonstrated a number of copper and optical products suitable for multi-rack pods containing hundreds of XPUs.

PCI-based products

During 2025, Marvell expanded its range of PCI-based cable scale-up products based on its Alaska P PCIe retimer and some of these products were demonstrated at the event:

• PCIe Gen 6-based AEC cable – with a 7 metre range that provides scale-up connectivity across several racks. Cables and connectors are developed by partners Luxshare and Molex.
• PCIe Gen 6-based Active Optical Cable (AOC) – an end-to-end active optical cable solution with a range of 10 meters developed with partner TeraHop. Using PCIe over optics, system designers can create longer links while leveraging the lower latency of PCIe.
• PCIe Gen 7 – Marvell demonstrated Gen 7 technology across a 10-foot optical cable with a data rate of 128 GT/s.

Alaska A products

Marvell also demonstrated an 800G AEC cable developed in association with Texas start-up Infraeo, which provides a range of up to 9 meters across copper. This cable device uses Marvell’s 100G/lane Alaska A PAM4 DSP and enables cooper connections that span almost the length of a standard 10 rack row. Marvell is also developing a 200G/lane 1.6Tbps PAM4 AEC cable with a range of 4 meters.

Co-Packaged Copper

Marvell has developed a range of co-packaged copper (CPC) solutions. CPC is most useful for short reach applications, for example, connecting GPUs/XPUs to each other or to a switch within a single rack. Copper remains attractive as CPC solutions can meet high-bandwidth demands while avoiding the losses and complexity associated with long PCB traces. For longer distances (rack-to-rack, cross data center), optical solutions such as AOC or Co-Packaged Optics (CPO) are preferred.

Marvell demonstrated CPC solutions developed in association with Samtec using the latter’s Si-Fly HD co-packaged cable/connectors working with 200G/lane SerDes and targeting 100T-class switching topologies (Figure 1).

Figure 1: Marvell’s CPC Solution with Samtec’s Si-Fly HD CPC cable connectors

Transition to Optical-Based Scale-Up

Copper-based interconnects used in today’s scale-up systems are nearing their limits in terms of reach and bandwidth. Although 224G/lane Serdes is state-of-the-art today for copper-based interconnects, the industry will transition to 448G/lane over the next two years and therefore will need to turn to optics. In contrast to copper, optical interconnects offer much higher bandwidth and support physically longer cables enabling AI clusters to be distributed across larger areas. Hence, for 448G/lane Serdes, CPO must be used, particularly with multi-rack scale-up configurations, as copper cannot provide the reach, and there is insufficient space for optical modules.

Celestial Acquisition

Marvell is acquiring Celestial AI, one of a host of silicon photonics companies developing solutions for AI data centers. Celestial AI’s Photonic Fabric (PF) technology platform is purpose-built for the transition to optical -based scale-up. It enables large AI clusters to scale both within and across racks using a cost-effective optical fabric. Celestial AI claims its solution delivers more than twice the power efficiency of copper interconnects, with significantly higher bandwidth and far greater reach.

Celestial AI’s first-generation product is a PF chiplet, which integrates the required electrical and optical components - drivers, TIAs, equalizers, SerDes, microcontrollers, modulators, photodiodes and waveguides - into a compact form factor. According to the company, this is the industry’s first scale-up optical solution providing an unprecedented 16Tbps of bandwidth in a single chiplet. Due to the compact form factor, multiple PF chiplets can be co-packaged with XPUs on one side of the link and scale-up switches on the other.

Key technical innovations include:

• 3D/Vertical Integration – in addition to high bandwidth, Celestial AI’s solution has exceptionally low power consumption, nanosecond-class latency and excellent thermal stability. This latter point is a particularly important feature and a significant competitive differentiator as it enables reliable operation in extreme thermal environments inside large, multi-kilowatt XPUs.
  Most CPO designs attach the optical light engines to the edges of an XPU on a substrate. Celestial AI claims that its technology is sufficiently thermally stable to be co-packaged vertically in a 3D package, with the photonic connection made directly to the XPU rather than at the edge of the die. This avoids the “beachfront” problem, i.e. the lack of space at the edge of a chip to attach wires, resulting in ten times the I/O density compared to other CPO designs and overall a more compact and integrated solution. The freed die-edge beachfront can thus be repurposed to increase the amount of HBM in the XPU package and the available package bandwidth for XPUs and switch systems.
• Memory disaggregation – Celestial AI’s PF technology supports optical CXL memory pooling, which means that HBM and DRAM memory no longer need to be located close to the XPU (Table 1). Using Celestial AI’s Optical Multi-Chip Interconnect Bridge (OMIB), the PF chiplet enables a XPU to connect to a CXL memory pool located in a separate memory appliance located several metres away - thus overcoming the problem of memory stranding. As the connection is optical, the latency is low enough (<150ns) for the XPU to assume the remote memory is local. Another major benefit is that less expensive DDR5 memory can be used instead of HBM4 memory.

Source: Counterpoint Research

Table 1: Comparison of HBM4 versus Optical/CXL Memory Pools

Marvell will pay $3.25 billion following regulatory approval. However, the total amount paid could reach $5.5 billion if Celestial AI meets specified revenue targets by the end of Marvell’s fiscal year 2029. The acquisition should close in the first quarter of 2026, subject to the usual regulatory reviews.

Update: In early January, Marvell announced the acquisition of Xconn Technologies, a specialist in CXL and PCIe switching, for $540 million. The company launched the industry’s first hybrid CXL/PCIe switch, Apollo, in March 2024. In March 2025, the upgraded Apollo 2 SoC was launched, which integrates CXL 3.1 and PCIe 6.2 protocols. The acquisition will expand Marvell’s switch portfolio and enhance its UALink expertise.

Packaging and Cooling

Marvell also discussed its latest innovations in in-package microfluidic-based cooling. Cooling is a critical challenge facing AI data center operators. Today, most high-performance AI servers use direct liquid cooling, typically using a cold-plate design directly attached to the GPU/XPU or switch ASIC. However, as the Thermal Design Power (TDP) of processors reaches and extends beyond 4kW, more innovative designs will be needed.

Marvell is investigating numerous technological solutions, including microfluidics. This involves etching tiny microchannels onto the GPU/XPU packaging or directly onto or inside the processor itself. Smaller channels have greater surface area and remove heat more effectively. Together with its foundry partners, Marvell announced that it is developing three solutions based on microfluidics whereby the cooling channels are etched: (a) onto the packaging; (b) onto the die and (c) inside the die in a 3D-based cooling design, as shown in Figure 2.

Figure 2: Marvell’s Package Integrated Cooling Solutions (PICS)

Scale-Up and Scale out Switching

Switching was another important theme at the event with Marvell revealing their switch roadmap. Scale-up fabrics need ultra-low latency for nanosecond response times and deterministic latency for synchronized communication. Marvell announced that it is developing 200G/lane 57Tbps and 115Tbps UALink switch silicon expected to be available in 2027.

For scale-out, Marvell is developing 3nm 200G/lane silicon with aggregate throughput of 102Tbps, expected to be available in 2026. Both Ball Grid Array (BGA) and CPC options will be available. Later in 2027, the company plans to introduce 204Tbps Ethernet scale-out switch silicon available in both CPC and CPO versions with 409Tbps silicon expected in 2028. In addition, Marvell is developing a 200G/lane 115T switch silicon for E-SUN, which combines both scale-up and scale-out.

Golden Custer and Reliant Software

As AI clusters scale to hundreds of thousands of GPUs, the physical cables connecting them have become a major point of failure. Large AI training runs can cost millions of dollars and if one cable fails, there is a risk that the whole training run might crash. Marvell’s Golden Cable initiative provides validated reference designs and firmware for 1.6T AEC cables. Essentially, this ensures that cables from different manufacturers work perfectly with Marvell’s silicon. Marvell has also developed the Reliant software suite, which provides real-time telemetry and can therefore predict when a cable is about to fail.

Analyst Viewpoint

AI is reshaping data center architecture at an unprecedented rate and data center operators are facing many challenges. Front and foremost is power consumption. Data-centre clusters are growing rapidly in size as AI models become ever larger. This growth is unsustainable unless new ways are developed to reduce data center power consumption. At the same time, data center operators need to scale-up to increase performance. Marvell demonstrated a strong portfolio of innovative products that will help data center operators achieve these goals.

• Custom Silicon – as data centers hit power capacity limitations, Marvell’s custom silicon innovations, such as its customized HBM and SRAM memory solutions, will play a key role in reducing data center power consumption, as will its PIVR solution, which eliminates power losses occurring on traditional motherboards. Counterpoint Research believes that these innovations will enhance Marvell’s custom XPU and XPU attach opportunities going forward.
• Scale-Up Networking - Marvell announced its intention to intensify its focus on scale-up networking, a space currently dominated by Nvidia’s NVLink. Scale-up networks are no longer confined to a single rack but are evolving into multi-rack compute systems with hundreds or thousands of XPUs. Counterpoint Research believes that this is a major opportunity for Marvell as it expands and refines its strategy of being a one-stop shop for AI accelerated infrastructure.
  An integral part of this strategy is the acquisition of start-up Celestial AI, which provides Marvell with access to a new disruptive technology. Although CPO is very much in the limelight right now, copper will remain the preferred solution wherever possible due to its lower cost and simplicity, meaning that data center customers will need copper-based solutions for many years to come. Marvell recently extended its range of copper-based AEC and AOC products to accommodate multi-rack solutions. As a result, Marvell will now have a complete portfolio of both passive and active copper scale-up solutions to meet customers’ needs, depending on the application, while the acquisition of Celestial AI positions the company perfectly for the upcoming optical multi-rack scale-up boom.
• Memory Disaggregation and Pooling – while strengthening Marvell’s position in optical scale up networking, the Celestial AI and XConn Technologies acquisitions also open up new market opportunities. Combining XConn’s ultra-low latency Apollo CXL/PCIe switches with its own Structera memory controllers and accelerators, plus Celestial AI’s optics, provides Marvell with the technology base to target opportunities beyond cloud and hyperscale data centers, such as HPC, in-memory databases and analytics, telecoms, edge computing, etc.