Overview: This workbook provides granular unit shipment forecasts and host CPU architecture attach rates from 2024 through 2028, supporting our latest research note and PR: "ARM CPUs Accelerate Structural Takeover in AI ASIC Servers, on Track for 90% Market Share by 2030."

Key Insights & Datasets:

• Host CPU Architecture Transition: Detailed tracking of the structural shift from merchant x86 processors to proprietary ARM-based designs across major hyperscalers' custom AI server infrastructure.
• Hyperscaler ASIC & CPU Roadmaps: Generation-by-generation analysis of specific ASIC models (e.g., Google TPU, AWS Trainium, Microsoft Maia) and their respective host CPU pairing choices, highlighting the inflection point of ARM adoption.
• Supply Chain & Advanced Packaging Dynamics: Evolution of front-end nodes, back-end packaging, and the design partner landscape (Broadcom, Marvell, MediaTek, Alchip) that are enabling these next-generation, high-density AI clusters.

The workbook includes a detailed Data Center AI Server Compute ASICs & Host CPU Tracker, fully segmented by the following dimensions:

• Company (Hyperscaler): (Google, AWS, Microsoft, Meta, OpenAI, Apple, xAI, Softbank, Fujitsu, ByteDance)
• ASIC Model Name: (TPU, Trainium/Inferentia, Maia, MTIA, Nexus Titan, etc.)
• Design Service Partner: (Broadcom, MediaTek, Marvell, Alchip, GUC, AMD)
• Front End Foundry & Process Node: (TSMC, Samsung / 5nm, 3nm, 2nm, A16, SF2P, etc.)
• Back End & Advanced Packaging: (TSMC, Intel / CoWoS-S, CoWoS-L, CoWoS-R, EMIB-T, SoIC, etc.)
• Host CPU Architecture: (x86, ARM, x86→ARM transition trajectories)