• Marvell’s custom silicon innovations, such as its customized HBM/SRAM memory and PIVR voltage regulator solutions, coupled with its upcoming in-package microfluidic-based cooling solutions, will help data center operators overcome two of their biggest challenges: power consumption and cooling.
  • Following its acquisition of Celestial AI, Marvell will be able to offer a complete portfolio of copper and optical scale-up solutions for single and multiple rack configurations. Counterpoint Research expects that the emerging optical scale-up market will be considerably larger than the existing copper-based scale-up market.
  • The acquisition of Celestial AI and the more recent acquisition of XConn Technologies, a specialist in CXL and PCIe switching, coupled with its own Structera CXL memory products, provides Marvell with a solid technology base to target a range of new market memory opportunities beyond cloud and AI data centers.


Marvell held its annual Industry Analyst Conference in Santa Clara in early December, where the company outlined its strategy for the next few years, as well as making some important product announcements. Although Marvell has multiple business units, the event focused solely on its AI data center business, comprising custom compute and optical/electrical connectivity solutions.

Custom Silicon Innovations

A recurring theme throughout the day was that “power is the new currency” and that data center operators are constrained by the power available to them. There is, therefore, a tremendous focus on reducing power requirements across data centers. Marvell has developed three custom compute solutions that provide substantial power reductions:

Customized HBM Memory - Marvell’s customized HBM solution delivers higher XPU performance while reducing interface power consumption by 75% compared to standard JEDEC-based interfaces. Reducing HBM size also provides 25% more real estate. Customers can leverage these savings to add more compute or HBM memory per XPU – or add new features.

Custom dense SRAM Memory - Marvell has developed a 2nm custom SRAM chip that occupies 50% less area at the same bandwidth compared to off-the-shelf chips. The chip is optimised to deliver maximum bandwidth to a data center, with 17x more bandwidth/mm2 compared to alternative chips. It also boasts 66% lower standby power. This enables customers to use more SRAM in their XPUs or have more compute at the same power. Marvell has redesigned its embedded SRAM and achieved an 80% reduction in total power compared to off-the-shelf alternatives.

Package-Integrated Voltage Regulator (PIVR) – as XPUs scale toward 4kW and beyond, traditional power delivery from the motherboard becomes highly inefficient. To help overcome this "power wall" effect, Marvell has developed a PIVR chip that essentially moves voltage regulation from several inches away on the PCB to directly underneath the chip package itself, eliminating the considerable power loss that occurs when electricity travels through the motherboard PCB.

By integrating technology from a number of power semiconductor partners directly into the packaging, hyperscalers are able to run 4kW+ processors that would otherwise be impossible to power or cool using traditional methods. Key partners include:

  • Empower Semiconductor - provides its FinFast™ technology, which allows for vertical power delivery. The company’s regulators are ultra-thin and can be placed directly under the processor, shrinking the power supply footprint by 5x.
  • Endura Technologies - offers a unique, node-agnostic digital architecture for 2.5D and 3D system architectures, focusing on high current density and minimal "voltage droop" (i.e., sudden voltage drops during high activity).
  • Infineon - leverages thin vertical trench technology and high-density power modules to bring power conversion as close as possible to the silicon.
  • Monolithic Power Systems (MPS) - contributes high-performance power management ICs (PMICs) and deep expertise in scaling power for hyperscale cloud infrastructure.

Marvell’s PIVR chip reduces power loss by 85% while achieving a 15% reduction in total product power. In addition, the PIVR chip enables a 60% reduction in power noise. Denser power delivery enables more compute per rack, which in turn increases ROI for data center operators.

Scale-up Products and Solutions

Another major theme was scaling-up AI servers and racks. Marvell demonstrated a range of copper and optical scale-up cable solutions at the event including several new products focused on multi rack scale-up solutions.

Copper-based scale-up

Copper will always remain the preferred scale-up solution, wherever possible, due to its low cost and simplicity, particularly for short-range, intra-rack applications. For example, 224G copper-based solutions based on Active Copper Cable (ACC) or Active Electrical Cable (AEC) are adequate for in rack scale-up, i.e., connecting XPUs to a switch. Marvell also demonstrated a number of copper and optical products suitable for multi-rack pods containing hundreds of XPUs.

PCI-based products

During 2025, Marvell expanded its range of PCI-based cable scale-up products based on its Alaska P PCIe retimer and some of these products were demonstrated at the event:

  • PCIe Gen 6-based AEC cable – with a 7 metre range that provides scale-up connectivity across several racks. Cables and connectors are developed by partners Luxshare and Molex.
  • PCIe Gen 6-based Active Optical Cable (AOC) – an end-to-end active optical cable solution with a range of 10 meters developed with partner TeraHop. Using PCIe over optics, system designers can create longer links while leveraging the lower latency of PCIe.
  • PCIe Gen 7 – Marvell demonstrated Gen 7 technology across a 10-foot optical cable with a data rate of 128 GT/s.


Alaska A products

Marvell also demonstrated an 800G AEC cable developed in association with Texas start-up Infraeo, which provides a range of up to 9 meters across copper. This cable device uses Marvell’s 100G/lane Alaska A PAM4 DSP and enables cooper connections that span almost the length of a standard 10 rack row. Marvell is also developing a 200G/lane 1.6Tbps PAM4 AEC cable with a range of 4 meters.

Co-Packaged Copper

Marvell has developed a range of co-packaged copper (CPC) solutions. CPC is most useful for short reach applications, for example, connecting GPUs/XPUs to each other or to a switch within a single rack. Copper remains attractive as CPC solutions can meet high-bandwidth demands while avoiding the losses and complexity associated with long PCB traces. For longer distances (rack-to-rack, cross data center), optical solutions such as AOC or Co-Packaged Optics (CPO) are preferred.

Marvell demonstrated CPC solutions developed in association with Samtec using the latter’s Si-Fly HD co-packaged cable/connectors working with 200G/lane SerDes and targeting 100T-class switching topologies (Figure 1).


Figure 1: Marvell’s CPC Solution with Samtec’s Si-Fly HD CPC cable connectors


Transition to Optical-Based Scale-Up

Copper-based interconnects used in today’s scale-up systems are nearing their limits in terms of reach and bandwidth. Although 224G/lane Serdes is state-of-the-art today for copper-based interconnects, the industry will transition to 448G/lane over the next two years and therefore will need to turn to optics. In contrast to copper, optical interconnects offer much higher bandwidth and support physically longer cables enabling AI clusters to be distributed across larger areas. Hence, for 448G/lane Serdes, CPO must be used, particularly with multi-rack scale-up configurations, as copper cannot provide the reach, and there is insufficient space for optical modules.