Tenstorrent at The Open Frontier: RISC-V Everywhere

Tenstorrent's 2025 shipping products and 2026 IP, chiplet and subsystem roadmap. Source: Tenstorrent

What the strategy tells us

The most important shift is the move into compute subsystems and chiplets. Ascalon Arsenal is the first clear product of that thinking. It means customers can spend less time integrating and more time differentiating. The chiplet products, Aegis and Quasar, take that a step further. A customer could combine a Tenstorrent CPU chiplet, a Tenstorrent AI chiplet and its own or third-party memory and I/O dies in a single package.

Open Chiplet Atlas

Open Chiplet Atlas (OCA) is Tenstorrent's attempt to standardise how chiplets from different suppliers fit together, with the ambition of becoming a natural anchor for multi-vendor designs. The company calls it the industry's first complete open architecture for chiplet reuse across vendors, fabs and processes. The goal is to lower the cost of entry for AI and CPU silicon and to let companies reuse parts that already exist in the ecosystem. 

Tenstorrent’s OCA ambition. Source: Tenstorrent

On the show floor

The keynotes were backed by working hardware. A Galaxy server was on display. Like all Blackhole-based systems, it uses GDDR6 rather than HBM, which keeps Tenstorrent away from the most supply-constrained memory in the market today, although at a cost in bandwidth. The most technical demo was an FPGA prototype of the Ascalon S CPU on a Synopsys HAPS-100 system, running the game Quake. For licensees, this kind of prototyping means they can start software bring-up and experiment with the stack long before their own silicon arrives.

A Tenstorrent Galaxy server with its compute sleds and networking ports. Photo: Counterpoint Research	Ascalon S emulated on a Synopsys HAPS-100 FPGA prototyping system. Photo: Counterpoint Research

Global deployments and the India hub

In India, one of Tenstorrent's key engineering hubs, the team does "all things RISC-V". That means CPU IP, system IP, verification, physical design and design-for-test, along with AI servers and robotics.

Deployments are scaling across regions. Galaxy servers are running at Equinix in the US, Japan's ai& uses Galaxy superclusters for sovereign AI inference, and several superclusters are installed in India, including one at Turiyam AI.

Galaxy servers and a Galaxy supercluster installed at Turiyam AI in India. Source: Tenstorrent

Tenstorrent's partner list in India includes Wipro, HCL, C-DAC, Turiyam AI, MosChip, MulticoreWare, Vayavya Labs, Baya Systems, InCore, Vyoma and Tessolve, with MIPS (now part of GlobalFoundries) also named as a friend and partner.

 

Outlook

Tenstorrent pairs RISC-V CPUs with AI accelerator IP and uses both in its own systems. Its open, modular strategy fits the industry's shift from monolithic dies to mix-and-match chiplets. That gives it a credible path to become a core supplier to companies seeking alternatives to closed architectures.

Milestones we will track over the next 12 to 18 months:

• •     Progress on Callandor, the from-scratch high-performance CPU now in design, which would keep the CPU roadmap on schedule.
• •     First licensee designs built on Ascalon Arsenal, Aegis and Quasar.
• •     Open Chiplet Atlas adoption by other chiplet, memory and I/O vendors.
• •     Further supercluster deployments and partner-led chip projects across regions.

 

Analyst Views

•          Tenstorrent faces intense competition from Arm’s Neoverse and Lumex Compute Subsystems, as well as from SiFive’s P870 and Andes’ AX66 and Cuzco cores. Its differentiation lies in integrating CPU and AI IP, chiplets and servers within a single portfolio.
•           No RISC-V vendor, including Tenstorrent, has matched the data center production scale of Arm-based platforms such as AWS Graviton, Google Axion and Nvidia Grace. Qualcomm’s acquisition of Ventana Micro and its reported interest in Tenstorrent underscore intensifying competition.
•          Tenstorrent’s open-source software ecosystem remains immature relative to CUDA’s two decades of library development. In our assessment, it supports inference for compatible models but is not yet a drop-in replacement for CUDA across workloads.
•            Using GDDR6 instead of HBM reduces exposure to constrained memory supply and lowers costs, but sacrifices bandwidth. Tenstorrent offsets this with approximately 210 MB of on-chip SRAM per chip and multi-chip model distribution, increasing dependence on networking and software. Rack-level efficiency is therefore the critical metric.
•          Tenstorrent competes against substantially larger players across CPU IP, AI IP, chiplets, systems, and cloud infrastructure. Much of its 2026 roadmap remains undelivered to customers, while licensing revenue will depend on customer chip production ramps.
•          For chip startups worldwide, including India's growing base of design-led firms, the hardest part is the cost and risk of a first chip. Tenstorrent's combination of licensable RISC-V IP, ready-made subsystems, open chiplet standards and bring-up tools speaks directly to that problem.

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