Data centers are facing multiple conflicting challenges. On the one hand, there is an insatiable demand for compute due to the growth of Gen AI which is creating an explosion of data. On the other hand, operators need to improve energy efficiency and meet TCO and net zero sustainability targets. Chiplets are uniquely positioned to address these conflicting trends and represent a paradigm shift for the semiconductor industry, addressing several challenges associated with monolithic chip designs such as yield, cost and performance limitations.

Chiplets have been used in high-end chips for some time. Examples include the AWS Graviton 4, Huawei HiSilicon Ascend 910, Intel Gaudi 3, Nvidia GH200 Grace Hopper Superchip, Microsoft Maia and the SambaNova SN40L. Today, the market is still dominated by the hyperscalers and major chip vendors with most chiplet implementations done in closed ecosystems using proprietary interconnect standards.

The Holy Grail for the semiconductor community is the development of an open chiplet ecosystem, where companies can “mix-and-match” individual chiplets (compute, I/O, memory, etc.) à la carte and thus develop their own custom SoCs quickly and less expensively than with current monolithic SoC designs. The emergence of open standards such as Universal Chiplet Interconnect Express (UCIe) and the Open Compute Project’s Bunch-of-Wires (BoW) will lead to a gradual democratization of the chiplet market and ultimately the development of an open chiplet marketplace.

However, Counterpoint Research believes that it will probably take between 5-10 years before this concept becomes mainstream, particularly for some of the more price sensitive market segments such as IoT, consumer, etc. Developments in the hyperscaler/HPC markets – where companies have the need, expertise and financial resources to push chiplets - will happen much quicker and driven by catalysts such as the “chiplet chassis” idea developed by the likes of ARM, Paola Alto Electron and others. By leveraging proven third-party chiplet designs and IP, these AI CPU/accelerator chiplet platforms will enable smaller companies to build their own SoCs quickly and cost effectively, thus eliminating the need to build an ASIC from scratch. For many of these companies, this would simply be impossible. Instead, by integrating their own bespoke accelerator designs into a pre-qualified platform, they will be able to slash development costs and accelerate time to market.

Following the Chiplet Summit in Santa Clara, California last month, Counterpoint Research has published two reports on the emerging chiplet market: “Overcoming The Hurdles To An Open Chiplet Economy” and “Key Highlights from the 3^rd Chiplet Summit.”

Key companies mentioned in the reports include AD Technology, ARM, Alphawave Semi, Blue Cheetah, Credo Technology, Elyan, Keysight, Numem, Paola Alto Electron, Rebellions, Samsung Foundry and Synopsys. These reports are available to Counterpoint Research clients.

Overcoming The Hurdles To An Open Chiplet Economy

Table of Contents

Snapshots

Key Takeaways

Introduction

Chiplet Basics

Overview of Die-Ro-Die Interconnects

Importance of Packaging

Key Challenges

Analyst Viewpoint