- Synaptics launched the Coralboard SL which runs on the Synaptics Astra® SL2619 and announced a new Coralboard SR which runs on the SR250 from the Astra®SR200 series of MCUs. Both boards run the open-source, MLIR-based Synaptics Torq™ compiler.
- The new SR250 is a big step up from last year’s SR100, with 4x the AI power, a CPU twice as fast, and up to 256 MB of DRAM. It lets one chip handle a camera, a screen and voice, work that usually takes three chips.
- Google Research provided its Coral NPU technology to enable true edge AI developer freedom and Google wins when more devices run its Gemma models.vices run its Gemma models.
Until now, microcontrollers ran on a battery but were short on memory. Synaptics’ previous SR100 had about 3.6 MB on chip, enough for a wake word or a person detector. Anything richer, such as a camera with a screen and voice control, needed a Linux-class processor and external DRAM, three chips where one can do all the work. As AI workloads grow, transformer models need more memory. The new Coralboard SR carries the Astra®SR200, a self-hosted microcontroller line with up to 256 MB of DRAM. For products that still need that Linux-class processor, the Coralboard SL, developed with Google Research, brings the Astra®SL2619 to general availability. Both share one open compiler and that is where the contest has moved.
From TOPS race to toolchain race
For most of this decade, edge AI chips were sold on TOPS. What slows products down now is software. Take the always-on voice product the SR210 is built for. A team trains a keyword-spotting model in PyTorch, converts it with one vendor's compiler and rewrites the layers the NPU cannot run. If it switches chip suppliers two years later, most of that work starts over.
The SR200 announcement pitches Synaptics’ open MLIR/IREE-based compiler as a replacement for "closed vendor toolchains," and the Coralboard announcement aims to defragment edge AI development. That matters because the toolchain is the stickiest part of an embedded design. Test suites and safety certifications grow around it, so the vendor that owns it tends to keep the customer for several product generations. Synaptics wants that stickiness for itself: its three pin-compatible SR200 tiers share one SDK, so developers can scale up “while preserving their software investment.”
With this launch, Synaptics Torq™becomes the common AI toolchain across its newest chips, from the Linux-class SL2600 processors to the new SR200 microcontrollers. Torq™is built on open tools, MLIR and IREE, so developers can bring models from the frameworks they already use. The twist is that a rival adopting the Coral NPU could build on the same open foundations, so Synaptics’ hold will depend on being first and best on it.
Board 1: Synaptics Coralboard SL
The first board puts Synaptics’ Torq™compiler in developers’ hands. The Coralboard SL, developed with Google Research and built by module maker Grinn, went on sale worldwide through DigiKey on October 20, 2026. A limited edition that debuted at Google I/O in May 2026 and it opens the platform to any engineer who can place an order. For developers, it is an easy way to try the Coral NPU and Torq™on a Linux-class chip before committing to a design.
It runs the Astra®SL2619: two 2 GHz Cortex-A55 cores, a Cortex-M52 and a 1 TOPS Torq™NPU, the first silicon to implement Google's Coral NPU. The board adds 2 GB of DDR4, a microSD slot and NOR flash.
Cameras and displays connect over CSI/DSI and USB, Wi-Fi and Bluetooth through an M.2 slot. Qwiic and mikroBUS connectors take off-the-shelf sensors, and add-on HATs cover HDMI display, power, camera and digital mics.
Source: Synaptics
Board 2: Synaptics Coralboard SR
The second board takes the same compiler down to a microcontroller. The Coralboard SR is new and uses the Astra®SR250 (800 MHz Cortex-M85, Cortex-M52, 400 GOPS Torq™NPU) with up to 8 MB of SRAM and up to 256 MB of custom DRAM. It adds dual ISPs, multi-camera input and digital mics. Like the SL board, it has a microSD slot, NOR flash, Qwiic and mikroBUS connectors, and Wi-Fi and Bluetooth.
Source: Synaptics
The chip inside: Astra®SR200
The SR200 is a self-hosted multimodal MCU. In other words, one chip runs vision, voice, and a display without a separate application processor acting as host. Each SR200 tier adds 100 GOPS (200, 300, 400). Because the tiers are pin-compatible, an OEM can move up one step without a board respin.
Source: Synaptics press releases (October 20, 2026)
The chip pairs a fast 800 MHz Arm Cortex-M85 processor for demanding tasks with a smaller Cortex-M52 that stays on to read sensors and run light AI tasks at low power. Its Torq™AI engine, based on Google’s Coral design, runs both image-recognition and transformer models. An optional Cadence HiFi 5 audio processor handles sound and an always-on section listens for voice commands to wake the chip.
Memory comes in two tiers: up to 8 MB of SRAM as working memory for weights and frame buffers, plus up to 256 MB of custom DRAM. The DRAM removes the need for an external memory chip.
Synaptics aims the family at wearables, battery-powered sensing, connected cameras, streamers, and industrial vision and voice systems.
Where the boards and chips go
The boards and the chips play different roles. The two Coralboards are developer kits for prototyping; the SL2619 and the SR200 chips are what end up inside shipping products. Synaptics' two releases list overlapping targets, from wearables and hearables to industrial control and robotics.
Battery cameras and doorbells (SR250)
A doorbell today wakes on motion, then often asks the cloud whether it saw a person or a swaying branch. With an SR250, the always-on domain wakes the chip and the 400 GOPS NPU classifies the event on the device.
Dual vision paths and up to 256 MB of DRAM hold two camera streams without an external memory chip. Only the clips that matter leave the house, which cuts upload traffic and false alerts.
Wearables and hearables (SR210)
An earbud or a ring runs on a battery measured in tens of milliamp-hours and has room for one chip. The SR210 targets this case with 200 GOPS for always-on voice and sensing, plus the optional HiFi 5 DSP for acoustic models such as noise suppression.
Appliance panels with voice (SR230)
Picture an oven or coffee machine that recognizes who walked up and takes a spoken order. Today that panel usually runs Linux on an application processor. The SR230 offers vision, display and optional audio at 300 GOPS on Zephyr, which boots faster and needs less memory than Linux.
Industrial vision and voice (industrial variants)
On a production line, the AI is narrow and fast. An SR250-class camera node can check each part for defects or missing pieces as it passes and the same chip can listen to a motor or read its vibration to flag a bearing that is starting to fail. It can also take short spoken commands from a worker whose hands are busy. That is inspection-level AI: quick, repeatable yes-or-no decisions made on the machine, without sending video to a server.
Robotics and physical AI (Coralboard SL and SR)
A robot splits its AI by how fast and how smart each job has to be. In a humanoid robot, for example, an SR-class chip near the motors and sensors runs small, always-on models: spotting an obstacle, recognizing a gesture or hearing a spoken "stop." Higher up, the Linux-class SL2619 handles language and heavier vision. At Google I/O, the Coralboard SL ran Google's Gemma 3 model for voice control and translation, and a YOLOv8 vision model on the same board tracked jellyfish in real time.
The jump from SR100
The SR250 quadruples NPU throughput over the SR100 series and adds a memory tier that MCUs have not had.
Source: Synaptics press releases (March 10, 2025 and October 20, 2026)
Where the value goes
· Google has moved from selling chips to supplying designs and models. In 2019 it sold its own Edge TPU boards under the Coral name. In October 2025 it open-sourced the Coral NPU design instead, so any chipmaker can use it.
· Google's return comes through Gemma models running on more devices, and through its own products. We expect the next generation of Astra®chips to show up inside Google's own wearables and smart devices.
· Synaptics is moving from chip seller to platform owner. It still earns by selling chips, but it now also owns the layer developers build on: the NPU and its compiler, plus the two Coralboards that put both in developers' hands.
· Arm keeps the CPU socket but loses the NPU socket in the SR200. It still supplies the NPU in Synaptics' Wi-Fi 7 microcontrollers, the SYN765x and SRW1500.
Bottom line
For years, edge AI hardware and edge AI software have been chosen separately. With the two Coralboards and the SR200 family, Synaptics ties them together. One open compiler now runs from a battery-powered microcontroller to a Linux-class processor and a single SR250 can do the work of the MCU, application processor and DRAM it replaces.
The result is a simpler path from model to product, with fewer chips on the board and one toolchain that carries work across the range. If SR250 pricing undercuts the chips it replaces, we expect battery cameras to go self-hosted first, within 18 months of SR200 production. This launch makes Synaptics the first stop for open-NPU silicon through 2027, and Google wins whichever vendor ships next.
