XRING O3

XRING O3 features some breakthroughs, with 10-core all-big-core CPU architecture featuring 2x C1-Ultra + 4x C1-Premium + 4x C1-Pro and is built on TSMC’s 3nm node. Another major improvement is that it features 16-core G2-Ultra NX GPU delivering major GPU performance enhancement as compared to its competitors. The world's first smartphone SoC to support LPDDR6, with 10667 Mbps memory speed and 113.8GB/s memory bandwidth.

Key Parameters:

• Process Node: 3nm TSMC
• CPU: 10-core all-big-core
• GPU: 16-core G2-Ultra NX – 85% peak performance, 182% ray tracing improvement, and up to 64% lower power as compared to previous generation; 8 integrated NX neural accelerators (3.2K/120fps hardware frame interpolation).
• NPU: 4-core low-power architecture; 200 TOPS tensor at A8W4 precision; 3.13 TFLOPS vector.
• Memory: First SoC to support LPDDR6 with 10,667 Mbps speed and 113.8 GB/s; 60 MB system-level cache.

Comparison Between XRING O3 and XRING O1

XRING O100

The XRING O100 is the first AI-accelerator from Xiaomi. It vertically stacks a 6nm NPU compute wafer with dual high-speed DRAM memory wafers (Wafer-to-Wafer 3D Stacking), and uses advanced hybrid bonding, it is paired with Xiaomi’s in-house designed high-bandwidth matrix bus and features 14-core NPU with 1.22 TB/s memory bandwidth and up to 330 token/s edge inference on a 3B parameter model. The O100's wafer-on-wafer hybrid bonding at 1.4 μm pitch is among the major highlights, as it offers HBM-class bandwidth through advanced packaging on a mature 6nm node. XRING O100 is designed for on-device edge AI applications for devices including smartphones, PCs, robots, EVs, AI Cube.

Key Parameters:

• Architecture: 14-core NPU array; high-bandwidth matrix bus
• Packaging: 6nm with 3D wafer-level stacking; Wafer-on-Wafer advanced packaging, hybrid bonding at 1.4 μm bond pitch, 28,672 effective data lines
• Memory Bandwidth: 1.22 TB/s near-memory computing bandwidth
• Performance: 330 TPS on-device inference (Xiaomi lab)

XRING D100

Built on a 3nm process with a 20-core CPU and 16-core NPU architecture, the XRING D100 is designed to deliver high-performance AI computes for vehicles, featuring up to 160GB unified memory and can deploy 200B parameter on-device model.          

AI Cube

Xiaomi also showcased the AI Cube, an NPU-based engineering prototype mini-PC that combines the XRING O3, XRING O100 and XRING D100. The system supports local deployment of Xiaomi’s 120B and 3B MiMo models, with fast/slow system switching and up to 150W of sustained performance.

By bringing memory and compute closer together, the XRING O100 can potentially improve data-movement efficiency and reduce memory bandwidth bottlenecks in bandwidth-intensive AI and LLM workloads. This architecture could also give Xiaomi greater control over its hardware-software stack and create opportunities to reduce its reliance on third-party compute platforms.

Over time, Xiaomi could integrate its in-house chipsets across a broader range of devices, potentially reducing its dependence on third-party hardware platforms and improving cost efficiency and margins, although the extent of these benefits will depend on scale, yields, software maturity and overall chip development costs.