Overview

The fourth report in Counterpoint Research's $Trillion Bottleneck series on the AI memory wall looks at d-Matrix Raptor, the first AI accelerator with measured silicon that stacks logic directly on top of custom DRAM. By taking out the interface between compute and memory entirely, Raptor moves each bit into memory at 0.37 pJ/bit, compared with about 2.4 pJ/bit for HBM4. The report examines where that approach wins and where it falls short: capacity, DRAM density, an unnamed DRAM supplier, and what Alchip's packaging win and d-Matrix joining NVIDIA's NVLink Fusion ecosystem mean for the wider AI chip market.

What the Full Report Will Cover

  • Architecture breakdown of Raptor's inverted logic-on-DRAM stack compared with 2.5D HBM4 and 3D HBM-on-GPU
  • Energy-per-bit, bandwidth, capacity, and thermal comparison of Raptor and HBM4
  • Analysis of bonding pitch, microbump vs. hybrid bonding, and known-good-die economics
  • DRAM supply chain analysis, including who could make Raptor's custom DRAM die
  • What Alchip's packaging win means for Broadcom, Marvell, and MediaTek in the custom AI ASIC market
  • NVIDIA NVLink Fusion and the move toward disaggregated prefill and decode inference
  • Comparison of the leading approaches to the memory wall by departure from JEDEC and timeline to volume
  • Three outlook scenarios for DRAM-on-logic and custom HBM

Who Should Read This

  • Strategy and product teams at AI accelerator, GPU, and custom ASIC companies
  • Memory makers evaluating custom HBM and DRAM-on-logic opportunities
  • Foundries, OSATs, and advanced packaging providers
  • Hyperscaler and data center infrastructure teams planning AI inference hardware
  • Financial analysts and investors covering semiconductors and AI infrastructure

Key Questions the Report Answers

  • What is d-Matrix Raptor, and how does its 3D DRAM-on-logic design work?
  • How does d-Matrix Raptor compare with HBM4 on energy, bandwidth, and capacity?
  • Is DRAM-on-logic a threat to custom HBM base dies?
  • Who will supply the custom DRAM for d-Matrix Raptor?
  • Why did Alchip win the d-Matrix packaging deal over Broadcom and Marvell?
  • What does d-Matrix joining NVIDIA NVLink Fusion mean for AI inference hardware?
  • Which approaches to solving the AI memory wall are closest to volume production?

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