Foundry Monthly Intelligence Report, February 2026
Overview: This Foundry Monthly Intelligence Report provides timely, always-on market intelligence to keep you aligned with the latest developments in the foundry ecosystem. It includes ad hoc deep dives into emerging trends and market shifts, along with concise analyst takeaways that deliver real-time, decision-ready insights to support strategic planning and execution.
Table of Contents:
Apple’s N2 Capacity Allocation at TSMC Under Pressure from Aggressive AI-Driven Demand
- Apple’s dominant position at TSMC is weakening as other major customers aggressively adopt the latest process technologies, such as N2.
- Apple may not secure sufficient N2 capacity in 2026. Its bargaining power is declining as AI/HPC customers are willing to pay premium prices for advanced nodes.
- To mitigate capacity constraints, Apple is diversifying its AP lineup and adjusting launch schedules with the A20 Pro in H2 2026 and the A20 in H1 2027 to balance N2 wafer demand across different product cycles.
- In the long term, Apple is likely to pursue a second production source for leading nodes. Intel could be a potential partner, leveraging its Intel 14A-E process for external customers, potentially starting in 2029.
Intel Rebuilds Foundry Credibility Through 18A Ramp and 14A Customer Commitments
- Intel 14A emerges as the strategic battlefield. Management has tied future 14A capacity expansion directly to customer commitments, with key PDK milestones expected in H2 2026.
- 18A anchored by AI networking infrastructure and national security products. Intel has secured high-profile partners like Amazon (AWS) and Microsoft for custom AI silicon, as well as Boeing and Northrop Grumman for securing domestic manufacturing.
- NVIDIA pursues strategic diversification via 14A. NVIDIA is exploring Intel Foundry as a critical "second source" with x86 Server CPUs, PC iGPUs, and PC dGPUs by 2029.
- Apple returns to Intel to mitigate supply chain risks. Apple is expected to pilot small-scale productions on 18A in 2027 before evaluating 14A for MacBook solutions by 2029.
Tesla’s Silicon Pivot: AI5 and AI6 Dual-Source Strategy and the Resurgence of Dojo 3
- Tesla’s shift toward a dual source model for AI5 and AI6 leverages the upcoming TSMC Arizona and Samsung Taylor fab to mitigate geopolitical risk and ensure capacity allocation.
- The strategic resurrection of Dojo 3 secures a scalable, internal training backbone, reducing long-term dependency on merchant GPUs and completing Tesla's silicon independence.
Foundry Industry Reshuffle: Top 2 Players Reduce 8-inch Capacity
- TSMC and Samsung will reduce their 8’’ capacity by 20% and 40% respectively in 2025~2027. This contraction represents an 11% decrease in total 8’’ capacity among the global Top 6 foundries, amounting to a total reduction of 200~210KWPM.
- The capacity reduction is driven by sustained utilization rates below 80% and the need to reallocate constrained labor and facility resources for leading-edge node expansion. Faced with these resource bottlenecks, the companies are shifting focus from legacy nodes to support advanced technology growth.
- TSMC is scheduled to shut down Fab 2 and Fab 5 by end-2027, while Fab 6 will see a one-third capacity reduction in 2027~2028; meanwhile, Samsung will cut up to 100KWPM 8’’ capacity in 2025~2026. This strategic retreat will likely trigger an order transfer to other 8’’ foundry players, fostering a healthier and more sustainable industry structure for the global 8’’ market.
VIS’s Strong Wafer Demand Resulting from the Successful Product Portfolio Transition from DDIC to PMIC. The Wafer Price Increase Effect is Expected to Happen in Q2 2026
- In Q1 2026, VIS’s ASP is guided to experience a 3~5% decline, which seems conflicted with the strong UT Rate guidance of 80~85%. The expiration of older LTAs and the increase in wafer price for input wafers since Jan 2026 may be the main reasons, and we believe the ASP will rise again starting in Q2 2026.
- VIS is currently in a seller’s market where strong demand from clients, like Renesas’ MOS for AI server and Qualcomm’s PMIC, overwhelms VIS’s limited wafer supply. VIS benefits from this strong demand, thanks to the successful product portfolio transition over the past few years.
Apple’s N2 Capacity Allocation at TSMC Under Pressure from Aggressive AI-Driven Demand
- Apple’s dominant position at TSMC is weakening as other major customers aggressively adopt the latest process technologies, such as N2.
- Apple may not secure sufficient N2 capacity in 2026. Its bargaining power is declining as AI/HPC customers are willing to pay premium prices for advanced nodes.
- To mitigate capacity constraints, Apple is diversifying its AP lineup and adjusting launch schedules with the A20 Pro in H2 2026 and the A20 in H1 2027 to balance N2 wafer demand across different product cycles.
- In the long term, Apple is likely to pursue a second production source for leading nodes. Intel could be a potential partner, leveraging its Intel 14A-E process for external customers, potentially starting in 2029.
Apple’s postion in TSMC
Counterpoint projects that Apple may fail to secure sufficient N2 capacity at TSMC in 2026, as other customers are adopting N2 sooner than the adoption pattern seen with N3. When N3 entered mass production in 2023, Apple was the sole customer using the node at that time, applying it to the A17 Pro and M3 chips. However, in the first year of N2 mass production, not only Apple’s A20 Pro and M6, but also Qualcomm’s Snapdragon 8 Elite Gen6, MediaTek’s Dimensity 9600, AMD’s Venice server CPU and MI450 server GPU, and Intel’s Nova Lake PC CPU are expected to adopt the N2 family starting in H2 2026.
From a demand perspective, we believe N2 demand will be stronger than N3 during the same phase of production. AI-driven demand is pushing these customers to pursue higher performance and better power efficiency, making N2 demand much stronger than N3’s during its first year of ramp-up.
From a supply perspective, although TSMC plans to expand N2 capacity more aggressively than N3 (55~60KWPM for N3 by end-2023 vs 65~70KWPM for N2 by end-2026), it is still unlikely to meet all customers’ requirements.
Table: TSMC Customer, Capacity Estimation in Leading Nodes - First Year Mass Production

From a supply perspective, although TSMC plans to expand N2 capacity more aggressively than N3 (55~60KWPM for N3 by end-2023 vs 65~70KWPM for N2 by end-2026), it is still unlikely to meet all customers’ requirements.
As a result, we expect N2 capacity to remain constrained in 2026, forcing Apple to compete with other TSMC customers for capacity allocation. Unlike previous generations, when Apple was the exclusive first-year user of the most advanced process, its dominance in securing early access to leading nodes is diminishing. Consequently, Apple may lose part of its process leadership advantage. While Apple’s A20 Pro will adopt N2, Qualcomm and MediaTek’s flagship APs may even move ahead with the enhanced N2P version.
Apple has usually been the first one to launch products with chipsets on the latest available leading node and “Apple Silicon” has been a key differentiation for its products. Hence, securing leading-edge node capacity is important for Apple, especially for iPhone, iPad and Mac. Together, these three products contributed to 65% of Apple’s global revenues in FY 2025.
Graph: Apple’s Share of TSMC’s Leading Node Capacity Allocation

Implications and Strategy for Apple
As Apple’s dominance in securing leading node capacity weakens, we see two major implications:
- Limited Capacity Support:
As more customers are eager to adopt the latest process technologies at an earlier stage, Apple may find it increasingly difficult to secure sufficient leading node capacity. From TSMC’s perspective, the company is now more willing to allocate advanced capacity across a diversified customer base to reduce reliance on a single large customer.
- Weaker Bargaining Power on Wafer Pricing:
Before 2024, Apple was TSMC’s largest customer and enjoyed favorable wafer pricing compared to other major clients. In previous tight-capacity environments, TSMC’s wafer price hikes for Apple were generally smaller than those for other customers. However, with surging AI and HPC demand, these customers are now willing to pay premium prices for advanced nodes, weakening Apple’s pricing leverage. As a result, we believe Apple’s bargaining power with TSMC has eroded, potentially leading to higher production costs going forward.
In response, Apple has been diversifying its application processor lineup. This strategy began with the iPhone 15 series in 2023 and is expected to continue through 2026. For the iPhone 18 series, Apple is expected to introduce two chips – A20 Pro and A20 with N2 technology. The A20 Pro will likely power high-end models, such as the iPhone 18 Pro, 18 Pro Max and foldable models, in H2 2026, while the A20 will power the iPhone 18, 18 Air and 18e in H1 2027.
The A20 is expected to launch in H1 2027 rather than H2 2026 and feature a smaller die size to reduce production costs in N2. This staggered launch strategy will also help Apple distribute its N2 wafer demand more evenly at TSMC. By implementing a dual-chip strategy and separating launch timelines, Apple may secure sufficient N2 capacity to support its full product lineup.
In the long term, we believe Apple may also seek a second source for leading nodes to diversify its supply chain and regain pricing leverage. Intel could be a potential partner, thanks to the geopolitical advantages, leveraging its Intel 14A-E process for external customers, with possible collaboration beginning around 2029.
Category
Industry
Semiconductors
Service
Foundry
Report Type
Report
Time Period
Monthly
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Author
Brady Wang
Hi, I’m Brady Wang, a seasoned professional with over 20 years of experience in the high-tech industry, spanning semiconductor manufacturing, market intelligence, and strategic advisory roles. Currently, I serve as an analyst at Counterpoint Research, where I specialize in semiconductors with a focus on advanced applications such as automotive, server platforms, and cutting-edge process nodes. My core research centers on AI servers and their key components, including GPUs, custom accelerators, high-bandwidth memory (HBM), CPUs, and advanced packaging technologies. I also track the evolution of AI server architectures, interconnect technologies, and data center deployment trends. By combining deep technical knowledge with market insight, I help clients navigate the fast-changing AI infrastructure landscape and make strategic, data-driven decisions.
William Li
William is a Research Analyst in Semiconductor and Components team, based in Taiwan. He has over 8 years of experience in global PC (personal computer) and semiconductor market. Before Counterpoint, he was an equity research analyst at Credit Suisse, focused on both technology and non-technology sectors as well as supporting Taiwan equity market strategy research. Prior, he worked for a Taiwan PE fund as a research analyst covering semiconductor and downstream components sector.
Jake Lai
Jake Lai is a Senior Analyst in the Semiconductor and Components team at Counterpoint, based in Taiwan. He currently leads the Counterpoint Foundry Service, leveraging over five years of experience in the foundry and semiconductor markets. Prior to joining Counterpoint, he served as an Assistant Manager at Samsung Foundry, where he specialized in Foundry Market Intelligence. Earlier in his career, he worked as an analyst at a Taiwanese research institution, focusing on the foundry and semiconductor sectors.
Shawn Zhang
Shawn is a Research Associate at Counterpoint Research. He has a strong academic background in semiconductor-related fields, holding both bachelor's and master's degrees in Electrical Engineering. Prior to joining Counterpoint Research, he served as a Research Assistant at the University of Texas at Austin, where he focused on integrated circuit (IC) design. He has a deep interest in the semiconductor industry and is driven by a passion for innovation and excellence in industry research. His technical foundation enables him to deliver in-depth insights that bridge engineering expertise with market intelligence.
David Wu
David Wu is a Research Associate at Counterpoint Research in Taiwan, dedicated to foundry and semiconductor research, providing insights into market trends and key industry developments. Prior to joining Counterpoint Research, he gained experience in Deal Advisory, Private Equity, and TMT Corporate Banking, where he built a solid foundation in industry research and financial analysis. David Wu holds a double bachelor’s degree in Accounting and International Business from National Chengchi University.