Global High Bandwidth Memory (HBM) bit demand for AI Server Compute ASICs is projected to balloon 35x from 2024 to 2028, according to the latest Data Center AI Server Compute ASICs Shipment Forecast and Tracker from Counterpoint Research’s HPC Service.

Building upon our previous analysis of custom silicon acceleration, this explosive growth is primarily underpinned by the widespread adoption of high-density memory architectures across proprietary accelerators. Key volume drivers include the aggressive scaling of Google’s TPU infrastructure to support the Gemini ecosystem, sustained deployments of AWS Trainium clusters, and the ramp-up of Meta MTIA and Microsoft Maia. While hyperscalers continue to aggressively expand their internal silicon portfolios, the overarching industry trajectory points to HBM as the critical enabler and primary capital expenditure focus for next-generation AI workloads.

A key highlight of this trend is the structural shift within the broader AI accelerator Total Addressable Market (TAM), where custom ASICs are about to capture a rapidly expanding share of global HBM consumption. Crucially, this volume surge is driven by a massive increase in memory density at the individual chip level. This exponential growth in per-chip density is a direct response to the escalating demands of next-generation AI workloads. As hyperscalers rapidly transition toward trillion-parameter models, multi-model architectures, and complex Mixture-of-Experts (MoE) designs, massive density is required to keep larger datasets closer to the compute cores, thereby maximizing data throughput, minimizing latency during advanced inference tasks, and ensuring that memory bottlenecks do not drag overall system performance.

This trajectory signifies that AI Server Compute ASICs will account for an increasingly substantial percentage of the overall HBM market, fundamentally diversifying memory demand away from a singular reliance on merchant GPUs. Concurrently, the underlying ASIC memory landscape is undergoing a definitive generational transition. HBM3E is expected to completely dominate, capturing roughly 56% of the total ASIC HBM bit demand mix by 2028, as cloud service providers prioritize maximum bandwidth capabilities and established supply chain maturity.

Commenting on the HBM3E share allocation, Research Associate David Wu highlighted,“HBM3E has proven to be the sweet spot for current AI architectures, delivering the immense bandwidth and density required to overcome memory wall bottlenecks for massive parameter models. Now that Samsung has stabilized its yields and alleviated previous supply constraints, major cloud providers are confidently standardizing their upcoming ASICs on HBM3E. We project this broad adoption will sustain HBM3E's absolute majority in allocation share through at least 2028.”

Research Director MS Hwang stated, "Up until HBM3E, HBM was characterized as an off-the-shelf product with minimal differentiation between customers. However, starting with HBM4, where logic is integrated into the base die, and progressing into HBM4E, the market will increasingly evolve toward custom HBM."

Hwang added, "The adoption of custom HBM will continue to grow to drive specialized performance enhancements for ASICs. This presents a significant opportunity for memory suppliers to create a high-value business by reflecting logic die design costs in their pricing, while securing stable volumes through a strong lock-in effect with customers."

Highlighting the need for advanced packaging and capacity dynamics, Senior Analyst Ashwath Rao said, “TSMC remains the primary beneficiary, as most vendors continue to adopt its CoWoS-S and CoWoS-L solutions.”

Rao further added, “However, amid ongoing capacity constraints at TSMC, we observe that Google and several other key industry players are now considering Intel's EMIB-T for their next-generation advanced packaging needs. A successful deployment of this technology will serve as a pivotal industry milestone helping the industry diversify beyond TSMC by introducing a highly viable alternative that delivers superior cost efficiency and accommodates larger package sizes.”

From a vendor market share perspective, the global HBM landscape will remain heavily consolidated, with SK Hynix and Samsung retaining their dominance for the foreseeable future. However, the internal distribution of this market share is actively evolving. We expect Samsung to steadily expand its footprint and close the gap at an accelerated pace. Having successfully navigated previous production bottlenecks, Samsung's stabilizing yields and refined product performance have positioned the tech giant to aggressively reclaim allocation share in the upcoming waves of AI infrastructure deployments. Since this is not a zero-sum game, we are keeping an eye on Micron’s design wins and capacity to make strong inroads into HBM for this custom AI Server Accelerator market.

Commenting on the demand concentration among these AI Cloud Service Providers (CSPs), Research Director Gunnar Thoresen said, “Google remains the primary driver of the custom silicon market. Based on our latest supply chain channel checks, we maintain a highly constructive outlook on the deployment trajectory of Google's TPU ecosystem across the 2026 and 2027 timeframe.”

Thoresen added, “Consequently, we have revised our shipment forecasts upwards for the upcoming TPU generations. This aggressive infrastructure scaling translates directly into a massive expansion of Google's HBM requirements, further cementing its position as the anchor customer for global advanced memory capacity.” 

For detailed research, refer to the following reports available for subscriber clients:

AI Server Compute ASIC Shipments to Triple by 2027 as Custom Silicon Enters Hyper-growth Phase

Global AI Server Compute ASIC Shipment by Chip Model, Hyperscaler, Design Partner & Foundry Forecast, Jan 2026

Foundry Monthly Intelligence Report, February 2026

Memory Price Tracker, March 2026: Prices More Than Double in Q1 2026

Memory Tracker and Forecast Insights Report, Q4 2025

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