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Note:Percentage totals may not add up to 100% due to rounding.

TSMC opened the earnings season for Q3 2025 with a robust performance, based on the company’s foreign exchange assumption of $1=NT$29, TSMC’s third-quarter revenue reached around $33.1 billion, surpassing its prior guidance range of $31.8 to $33 billion. This achievement reflects strong traction at 3nm and sustained high utilization at 4/5nm, supported by ongoing orders from AI GPU and HPC customers as well as premium smartphone platforms.

At the overall foundry level, TSMC continues to drive momentum for leading-edge nodes, and utilization remained exceptionally tight throughout Q3. The ramp-up of 3nm production, led primarily by Apple, coupled with sustained demand for 4/5nm chips from NVIDIA, AMD and other hyperscale customers, kept overall capacity at full utilization. To ease persistent supply constraints, TSMC allocated more capacity to support the higher-value N3 and N5 nodes.

In contrast, utilization across 6/7nm declined slightly, while 12/16nm and 22/28nm nodes, which had rebounded in the previous quarter on the back of Wi-Fi 7 chipset migrations, began to moderate again in the third quarter. Mature-node foundries outside China are expected to see utilization rates retreat to around 75% to 80%, down from above 80% in the prior quarter. This pullback reflects the easing of non-AI demand following tariff-related order pull-ins during the first half of the year, together with a normalization of seasonal patterns. Within the mature-node segment, 12-inch production showed a relatively stronger recovery than 8-inch lines, which remained weighed down by continued weakness in the automotive and industrial sectors.

Intel

Intel 18A is positioned as the company’s most advanced, domestically developed fabrication technology, first used in Panther Lake, with the production hub being Fab 52 in Arizona. The utilization rate is a key variable determining the success and profitability of 18A, although its current status is not yet stable.

Regarding the commercial timeline, Intel projects that wafer commitments to its foundry customers will begin in 2026, with high-volume production and lead customers expected to ramp up between 2026 and 2027. Intel has also pivoted its foundry strategy to be customer-commitment driven rather than building speculative capacity. This shift ensures that capacity expansion is directly tied to confirmed demand. The success of the 18A process, particularly its ability to stabilize and achieve the target utility rates, will determine Intel’s internal capacity. Should the development fall short of expectations, the company may need to outsource a portion of its production to external foundries.

Samsung

Samsung’s advanced process utilization rate and wafer consumption both increased in Q2 2025, and this momentum is expected to continue into the second half of the year. The growth was primarily driven by shipments of smartphone chips.

Going forward, the outlook for Samsung’s advanced nodes will largely depend on the success of its 2nm chips. Beyond its in-house Samsung Exynos lineup, the outcome of its collaboration with Tesla in the coming years will be a key factor determining whether Samsung can attract more customers and secure additional orders in the advanced process node.

COWOS demand driven by AI servers

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The rapid expansion of CoWoS demand continues to redefine the global foundry landscape. TSMC remains at the center of this transformation but is grappling with capacity limitations amid overwhelming AI-related orders from cloud service providers. OSAT companies such as ASE have absorbed part of the CoWoS overflow but continue to face yield and scaling challenges. TSMC’s CoWoS capacity is now projected to exceed 100,000 wafers per month by the end of 2026, supported by the ramp-up of NVIDIA’s GB200 and GB300 platforms, as well as ASIC production for Google’s TPU, AWS’ Tranium and Meta’s MTIA accelerators. CoWoS-L is expected to remain the primary driver of TSMC’s packaging expansion, while the company’s CoWoS-R and InFO/SoIC platforms gain traction in high-performance client and networking applications.

Beyond AI GPUs, advanced packaging is expanding its presence across the broader semiconductor ecosystem. Networking chips such as Broadcom’s Jericho and Tomahawk series, as well as AMD’s Venice server CPUs, are notable examples of CoWoS integration, highlighting the growing intersection between front-end wafer fabrication and back-end system design. Packaging innovation has thus become a key differentiator in the Foundry 2.0 landscape, allowing both foundries and OSAT companies to participate more strategically in system-level performance optimization.

In the OSAT segment, ASE continued to demonstrate leadership, with September revenue rising 9% YoY. The company’s preliminary third-quarter revenue is estimated at $5 billion, based on its foreign exchange assumption of $1=NT$29.2. The growth was fueled by overflow demand from TSMC’s CoWoS-S orders, as well as broader momentum in advanced packaging applications serving both AI and mobile segments. Increasingly, AI accelerators, networking ASICs, and next-generation smartphone SoCs rely on 2.5D and 3D packaging technologies to deliver enhanced performance, bandwidth, and energy efficiency.

In summary, Q3 2025 marked a pivotal moment in the evolution of the global foundry industry. Foundries are transforming into vertically integrated solution providers capable of co-designing silicon and packaging architectures, while OSAT companies are emerging as essential partners in enabling AI-scale computing. The continued strength of AI demand has reaffirmed that the growth of advanced nodes and advanced packaging will remain deeply intertwined, driving the next wave of semiconductor innovation across data centers, consumer electronics, and emerging intelligent systems.

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